Ero sivun ”Brother” versioiden välillä

Nykyinen versio 29. huhtikuuta 2018 kello 17.45

Brother LW-20, LW-30 LW-100 LW-400 and WP-70 disk format

• Based on one set of Brother LW-30 dumps. All were single sided, tracks were offset, logical track 0 is on physical track 2, 12 sectors per track, 256 bytes per sector.
• Bitcell timing is the same as with 300 rpm FM.

Documentation

8-bit GCR (MSB always 1) to 5 bits of data, translated in continuous stream, 8 GCR bytes into 5 decoded bytes at a time:

AA  00     BA  08     DA  10     EE  18
AB  01     BB  09     DB  11     EF  19
AD  02     BD  0A     DD  12     F5  1A
AE  03     BE  0B     DE  13     F6  1B
AF  04     BF  0C     DF  14     F7  1C
B5  05     D5  0D     EA  15     FA  1D
B6  06     D6  0E     EB  16     FB  1E
B7  07     D7  0F     ED  17     FD  1F

16-bit GCR to track/sector number translation table:

EFDA  00     DEEB  10     D5DE  20     B7EF  30     ABFD  40     D5B5  50     B7BE  60     ABDB  70
ADB7  01     F7D5  11     EBBD  21     DADA  31     BDEB  41     EBF7  51     DAAD  61     BDBA  71
BEFB  02     B5AF  12     FDAB  22     EFB7  32     DED5  42     FDDE  52     EFEF  62     DEFD  72
DFEA  03     D6F6  13     BAEE  23     ADFB  33     F7AF  43     BABD  53     ADDA  63     F7EB  73
FABF  04     EDDD  14     DBD7  24     BEEA  34     B5F6  44     DBAB  54     BEB7  64     B5D5  74
B6AE  05     AABB  15     F5B6  25     DFBF  35     D6DD  45     F5EE  55     DFFB  65     D6AF  75
D7F5  06     BBED  16     AEFA  26     FAAE  36     EDBB  46     AED7  56     FAEA  66     EDF6  76
EEDB  07     DDD6  17     BFDF  27     B6F5  37     DDAA  47     BFB6  57     B6BF  67     AADD  77
ABBA  08     F6B5  18     EABE  28     D7DB  38     F6ED  48     EAFA  58     D7AE  68     BBD6  78
BDFD  09     AFF7  19     FBAD  29     EEBA  39     AFD6  49     FBDF  59     EEF5  69     DDB5  79

Three sector interleave tables:

 1   1   1
 6   2   4
11   3   7
 4   4  10
 9   5   6
 2   6   9
 7   7  12
12   8   3
 5   9  11
10  10   2
 3  11   5
 8  12   8

Sector layout (sectors are read and written one at a time):

0xAA
0xAA * 0x30
0xBF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFE

0xAB     Sector header lead byte checked by the ROM routine
DATA     = 16 bit value for track + 16 bit value for sector from translation table
0xDD     Sector header trail byte checked by the ROM routine

0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xAA 0xBF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFE

0xED     Sector data lead byte checked by the ROM routine
DATA + CRC = 416 GCR bytes that decodes to 256 databytes and 4 CRC-bytes
0xF5     Sector data trail byte 1 checked by the ROM routine
0xDD     Sector data trail byte 2 checked by the ROM routine

0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD

CRC routine, in the end regC, regD & regE contain the three CRC bytes calculated from the decoded databytes, fourth byte always decodes to 0x58 or else ROM checksum routine fails:

int offset = 0;
unsigned char regC = buffer[offset++];
unsigned char regD = buffer[offset++];
unsigned char regE = buffer[offset++];
unsigned char bytes = 0xFD;

while (bytes) {
    regA = regD;
    if (regC >> 7) regA ^= 1;
    regD = regC;
    regC = regA;
    regA = (regD << 1) ^ regE;
    regE = regD;
    regD = regA;
    regE ^= buffer[offset++];
    bytes--;
};